1. Field of the Invention
This invention relates to a semiconductor device comprising a silver-containing metal region and a process for manufacturing the device.
2. Description of the Prior Art
Recent increasing integration of a semiconductor device has required the use of copper as a material for an interconnection or plug. Copper has advantageous properties of a lower resistance and higher electromigration resistance compared with aluminum which has been conventionally used.
However, as a device has become more compact, electromigration has been significant in such an interconnection using copper. A copper film as a copper interconnection is usually formed by plating, which gives the copper film as an aggregate of a number of polycrystalline copper grains. When a voltage is applied to a copper interconnection having such a structure, mass transfer occurs via a copper grain boundary, leading to electromigration. In a narrower interconnection, a copper grain size is smaller and thus the problem of migration due to mass transfer via such a grain boundary becomes more significant.
For solving such a problem of electromigration (hereinafter, referred to as “EM”), there have been several attempts where silver is added to a copper interconnection.
Japanese Laid-open Patent Publication 2000-349085 has disclosed an interconnection made of a silver-containing copper alloy, and described that the interconnection has a silver content within a range of at least 0.1 wt % to less than its maximum solid solution limit, and if more than the maximum solid solution limit, the metal may form a compound with Cu, leading to a rupture or crack in the interconnection.
Japanese Laid-open Patent Publication 1999-204524 has disclosed an interconnection made of a silver-containing copper alloy and described that a silver content in the interconnection is preferably 1 wt % or less and illustrates forming an interconnection made of a copper alloy containing silver at 0.1 wt % as a specific example.
Some other attempts using a silver-containing copper interconnection have been made for minimizing electromigration and all of these studies have concluded that in the light of the purpose, a silver content is within its solid solution limit in a copper film and thus at most 1 wt %. There have been developed no methods for consistently forming an alloy containing silver and copper with a silver content higher than the above limit and thus there have been little information about the physical properties of such an alloy film and its effects on device performance when applied in a semiconductor device.
Meanwhile, stress migration in a copper interconnection has become a significant problem. FIG. 2 shows a schematic cross section of a copper multilayer interconnection formed by a damascene method, where an upper interconnection 121b is connected with a lower interconnection 121a and the upper interconnection 121b consists of a connecting plug and an interconnection formed thereon. In FIG. 2(a), a void 122 is formed on the side of the upper interconnection 121b. That is, the void is formed in a via region in the upper interconnection 121b. In FIG. 2(b), a void 122 is formed on the upper surface of the lower interconnection 121a. Such a void 122 may be caused by an internal stress generated in the copper interconnection due to, for example, a heat history during a semiconductor process. In FIG. 2(a), the void 122 may be formed by upward migration of copper in the via due to copper “pull-up” in the upper interconnection 121b. In FIG. 2(b), copper may horizontally migrate in the lower interconnection 121a, leading to formation of the void 122.
Our studies have demonstrated that such a void-forming phenomenon prominently occurs about at 150° C. which is a practical process temperature for a semiconductor device (for example, in a bonding process and a photoresist baking process). A void thus formed may cause connection defect between a connecting plug and an interconnection, a reduced yield of a semiconductor device and instability in a semiconductor device after a long period use.
For preventing generation of such stress migration, besides investigating processes, a material itself for a metal region such as an interconnection must be studied besides process investigation.
Furthermore, the recent needs for much higher level of device operation require developing a material for an interconnection exhibiting higher-speed operability than a copper interconnection.